ASIC Principal Engineer
Opportunity Snapshot:
We are looking to hire an ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth knowledge of verification methodology and tools, good problem solver, excellent communication, as well as proven record of delivering functioning silicon. You will be part of a verification team responsible of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware, software and manufactire teams within the company during the project.
Responsibilities:
Participate in functional and micro-architectural discussions with design team Develop verification plan for module and/or chip-level verification based on design specs. Conduct initial test plan review, test object review, and exit reviews. Develop testbench as well as tests, including models, drivers, monitors, and checkers Gather and improve code coverage and functional coverage with designer's feedback Provide mentoring and guidance for other team members in verification methodology and tool usage. Required Skills:
Minimum 10 years of ASIC verification experience Fluent in SystemVerilog and UVM programming, and ability to leverage and reuse verification components from module level Strong problem solving and debugging skills Excellent written and verbal communications skills Experience with networking protocols (Ethernet, IPv4/v6, or MPLS) is a plus Knowledge of high performance memory subsystems MSEE or BSEE is required #JuniperASICengineeringUSA As Juniper is a US Federal Contractor, proof of completed COVID-19 vaccination is required for all U.S. employees. Juniper will consider accommodations for medical conditions or religious reasons on an individualized basis.
Salary Range:
$150K -- $200K
Minimum Qualification
Systems Architecture & EngineeringEstimated Salary: $20 to $28 per hour based on qualifications.
We are looking to hire an ASIC verification engineer with extensive experience on networking ASIC verification, with in-depth knowledge of verification methodology and tools, good problem solver, excellent communication, as well as proven record of delivering functioning silicon. You will be part of a verification team responsible of delivering ASICs for complex networking systems. You will collaborate with architects, design team, hardware, software and manufactire teams within the company during the project.
Responsibilities:
Participate in functional and micro-architectural discussions with design team Develop verification plan for module and/or chip-level verification based on design specs. Conduct initial test plan review, test object review, and exit reviews. Develop testbench as well as tests, including models, drivers, monitors, and checkers Gather and improve code coverage and functional coverage with designer's feedback Provide mentoring and guidance for other team members in verification methodology and tool usage. Required Skills:
Minimum 10 years of ASIC verification experience Fluent in SystemVerilog and UVM programming, and ability to leverage and reuse verification components from module level Strong problem solving and debugging skills Excellent written and verbal communications skills Experience with networking protocols (Ethernet, IPv4/v6, or MPLS) is a plus Knowledge of high performance memory subsystems MSEE or BSEE is required #JuniperASICengineeringUSA As Juniper is a US Federal Contractor, proof of completed COVID-19 vaccination is required for all U.S. employees. Juniper will consider accommodations for medical conditions or religious reasons on an individualized basis.
Salary Range:
$150K -- $200K
Minimum Qualification
Systems Architecture & EngineeringEstimated Salary: $20 to $28 per hour based on qualifications.
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